EXHIBIT 10.37 FOUNDRY AGREEMENT BETWEEN ADVANCED MICRO DEVICES, INC. AND TAIWAN SEMICONDUCTOR MANUFACTURING CORPORATION, LTD. CONFIDENTIAL PORTIONS OF THIS DOCUMENT HAVE BEEN DELETED AND FILED SEPARATELY WITH THE SECURITIES AND EXCHANGE COMMISSION PURSUANT TO A REQUEST FOR CONFIDENTIAL TREATMENT. TABLE OF CONTENTS 1. DEFINITIONS......................................................... 1 2. PROCESS TECHNOLOGY.................................................. 2 3. PRODUCTION.......................................................... 4 4. ON-SITE INSPECTION AND VENDOR INFORMATION........................... 5 5. TERM AND TERMINATION................................................ 6 6. CONFIDENTIAL INFORMATION............................................ 7 7. WARRANTY/ACCEPTANCE TESTING......................................... 7 8. PRICES/PAYMENT...................................................... 8 9. DELIVERY............................................................ 9 10. INDEMNIFICATION..................................................... 9 11. GENERAL............................................................. 10 EXHIBIT A (1.3) PRODUCTS................................................. 13 EXHIBIT B (1.4, 1.7, 1.8) QUALIFICATION REQUIREMENTS AND PLAN ........... 14 EXHIBIT C (1.9) RESERVED PRODUCTION CAPACITY............................. 16 EXHIBIT D (3.3) ACTUAL ORDERS............................................ 17 EXHIBIT E (8.1) PRICE TABLE.............................................. 18
AMD - TSMC FOUNDRY AGREEMENT THIS AGREEMENT (Agreement) is between Taiwan Semiconductor Manufacturing Corporation (TSMC), a Taiwanese corporation having its principal office at No. 121, Park Avenue 3, Science Based Industrial Park, Hsin-chu, Taiwan, and Advanced Micro Devices, Inc. (AMD), a Delaware U.S.A. corporation having its principal office at One AMD Place, Sunnyvale, California 94088-3453. WHEREAS, AMD has developed certain technology relating to microprocessors and other logic; WHEREAS, TSMC has developed manufacturing processes, capabilities and foundry capabilities to produce silicon wafers based upon the operational criteria and process technology provided by others; and WHEREAS, TSMC and AMD desire to enter into this Foundry Agreement for the manufacture by TSMC of microprocessor and other logic wafers containing AMD technology. IN CONSIDERATION of mutual promises in this Agreement, the parties agree as follows: 1. DEFINITIONS 1.1 "Die" means good silicon die produced according to the Qualification Requirements by TSMC for AMD using the Qualified Process. The Die are to be provided to AMD as Wafers with tested die. 1.2 "Wafer" means the six inch (6") diameter and eight inch (8") diameter wafers produced by TSMC for AMD using the Qualified Process. Where only six inch (6") or eight inch (8") wafers are referred to, they will be respectively specified as 6" or 8" Wafers. 1.3 "Products" means the different types of microprocessors or other logic to be produced from Die manufactured under this Agreement as set forth in Exhibit A (1.3) as amended from time to time by the mutual consent of the parties. 1.4 "Qualification Plan" means the steps to be taken to meet the objective reliability and quality specifications referred to as AMD Specification 00-021 as set forth in Exhibit B (1.4, 1.7, 1.8). 1.5 "Qualification" means the determination that the Die meet the Qualification Requirements in accordance with the Qualification Plan. 1.6 "Qualified Process" means the 0.5 micron or smaller AMD manufacturing process which will include AMD proprietary technology including, but not limited to, AMD's chemical mechanical polishing (CMP) process, with modifications made with the mutual agreement of the parties. The Qualified Process may be amended from time to time by the mutual consent of the parties. 1 1.7 "Qualification Requirements" means the criteria and specification the die must pass to be accepted by AMD, as set forth in Exhibit B (1.4, 1.7, 1.8). 1.8 "Transfer Documentation" means the topographical design rules, parametric specifications, and process information for the Qualified Process, as set forth in Exhibit B (1.4, 1.7, 1.8). 1.9 "Reserved Production Capacity" means the maximum capability to produce Wafers which TSMC will allocate to AMD and guaranteed to produce at AMD's request as set forth in Exhibit C (1.9). 1.10 "Confidential Information" means the provisions of this Agreement and the previously transferred and to be transferred information related to Wafer production, Products and test under this Agreement including all exhibits, and information including but not limited to technical information, database tapes, specifications, test tapes, masks and supporting documentation provided either orally, in writing, or in machine readable format and masks or reticles generated by or for TSMC using AMD database tapes; provided that all such information other than masks or reticles, is marked "Confidential" or similarly, or, if oral, identified as confidential at the time of disclosure and described in writing within thirty (30) days thereafter. Notwithstanding the foregoing, Confidential Information does not include information generally available to the public, information independently developed or known by the receiving party without reference to information disclosed hereunder, information rightfully received from a third party without confidentiality obligations, or information authorized in writing for release by the disclosing party hereunder. 2. PROCESS TECHNOLOGY 2.1 AMD will transfer to TSMC for the Qualified Process [CONFIDENTIAL INFORMATION OMITTED AND FILED SEPARATELY WITH THE SECURITIES AND EXCHANGE COMMISSION] as more fully described in the Transfer [CONFIDENTIAL INFORMATION OMITTED AND FILED SEPARATELY WITH THE SECURITIES AND EXCHANGE COMMISSION] 2.2 TSMC agrees that it will manufacture exclusively for AMD [CONFIDENTIAL INFORMATION OMITTED AND FILED SEPARATELY WITH THE SECURITIES AND EXCHANGE COMMISSION] or smaller devices which are capable of running an [CONFIDENTIAL INFORMATION OMITTED AND FILED SEPARATELY WITH THE SECURITIES AND EXCHANGE COMMISSION] or [CONFIDENTIAL INFORMATION OMITTED AND FILED SEPARATELY WITH THE SECURITIES AND EXCHANGE COMMISSION] compatible instruction set for a period beginning on the Effective Date and ending on [CONFIDENTIAL INFORMATION OMITTED AND FILED SEPARATELY WITH THE SECURITIES AND EXCHANGE COMMISSION]. This manufacturing exclusivity, however, does not apply to any manufacturing activity where TSMC uses its own process that does not include AMD's CMP process or any other AMD proprietary technology. 2.3 AMD grants to TSMC a personal, nonexclusive, irrevocable, nontransferable, right and license, without the right to grant sublicenses to third parties, to use the Qualified Process 2 relevant process information to make, use, and sell products of third parties except as provided in Section 2.2. 2.4 AMD will provide the initial mask set for each version or the initial mask for the mask set for each revision requested by AMD of each Product. TSMC will provide any subsequent mask set for each version or any mask set for each revision requested by TSMC. Such mask sets or variations thereof shall only be used for AMD. 2.5 Upon mutual agreement of the parties, production may be started prior to completion of full Qualification. 2.6 Die delivered for Qualification must meet all Qualification Requirements as set forth in Exhibits B (1.4, 1.7, 1.8). Quarterly progress reports will be provided by TSMC on its progress towards Qualification of the Qualified Process. 2.6.1 If TSMC successfully completes Qualification, then, upon written notice from AMD of successful completion, TSMC will proceed to manufacture and deliver Die at a rate which is agreed upon by TSMC and AMD in accordance with Section 3.2. 2.6.2 If TSMC fails Qualification, such failure shall not be considered a breach of this Agreement, and: 2.6.2.1 If TSMC is at fault or neither party is at fault, TSMC shall provide AMD with new Die at TSMC's expense within sixty (60) days after notification in writing by AMD of TSMC's failure to pass Qualification and shall repeat the process of Section 2.6 until TSMC successfully completes Qualification or AMD notifies TSMC it is terminating this Agreement after at least two unsuccessful attempts at Qualification which are the fault of TSMC. If AMD terminates this Agreement under this Section 2.6.2.1, the manufacturing exclusivity under Section 2.2 shall continue until [CONFIDENTIAL INFORMATION OMITTED AND FILED SEPARATELY WITH THE SECURITIES AND EXCHANGE COMMISSION], and the license to TSMC under Section 2.3 shall be suspended until [CONFIDENTIAL INFORMATION OMITTED AND FILED SEPARATELY WITH THE SECURITIES AND EXCHANGE COMMISSION]. 2.6.2.2 If AMD is at fault, TSMC shall provide AMD with new Die at AMD's request and expense within sixty (60) days after notification in writing by AMD of TSMC's failure to pass Qualification and shall repeat the process of Section 2.6 until TSMC successfully completes Qualification or either party notifies the other it is terminating this Agreement after at least two unsuccessful attempts at Qualification which are the fault of AMD. If this Agreement is terminated under this Section 2.6.2.2, the manufacturing exclusivity under Section 2.2 shall continue until [CONFIDENTIAL INFORMATION OMITTED AND FILED SEPARATELY WITH THE SECURITIES AND EXCHANGE COMMISSION], but the license to TSMC under Section 2.3 shall continue unabated. 2.6.3 The target date for completion of Qualification is June 31, 1995. TSMC will make its best effort to complete Qualification by August 31, 1995. Time is of the essence for AMD so that, if TSMC fails to complete Qualification by October 31, 1995, and AMD is not at fault, the 3 purchase minimum of Section 3.2.2 will be reduced to levels determined by AMD upon notice from AMD or this Agreement shall immediately terminate upon notice from AMD with no further opportunity for TSMC to complete Qualification. If AMD terminates this Agreement under this Section 2.6.3, the manufacturing exclusivity under Section 2.2 shall continue until [CONFIDENTIAL INFORMATION OMITTED AND FILED SEPARATELY WITH THE SECURITIES AND EXCHANGE COMMISSION], and the license to TSMC under Section 2.3 shall be suspended until [CONFIDENTIAL INFORMATION OMITTED AND FILED SEPARATELY WITH THE SECURITIES AND EXCHANGE COMMISSION]. 2.7 Before Qualification, TSMC and AMD will agree upon parametric and process flow specifications which will be finalized before TSMC begins production. TSMC will not modify agreed upon specifications or routine process control steps in any way without the prior written consent of AMD. 2.8 TSMC agrees that it will transfer the 0.5 micron Qualified Process to the 8" wafer production line currently under construction in a timely fashion. AMD will provide reasonable support for the transfer. 3. PRODUCTION 3.1 Using the Qualified Process, TSMC will manufacture the Products as Wafers with tested Die. 3.2 As soon as a process becomes a Qualified Process: 3.2.1 TSMC will reserve for AMD the Reserved Production Capacity on the Qualified Process. 3.2.1.1 The initial Reserved Production Capacity will become firm only when the Products are released for production and will ramp up as follows: Month After Release Rate (Wafers/Week) ------------------- ------------------ 1st [CONFIDENTIAL INFORMATION OMITTED AND FILED SEPARATELY WITH THE SECURITIES AND EXCHANGE COMMISSION] 2nd [CONFIDENTIAL INFORMATION OMITTED AND FILED SEPARATELY WITH THE SECURITIES AND EXCHANGE COMMISSION] 3rd [CONFIDENTIAL INFORMATION OMITTED AND FILED SEPARATELY WITH THE SECURITIES AND EXCHANGE COMMISSION] 4 3.2.1.2 Except for the production increases agreed to and provided for in Exhibit C (1.9) Reserved Production Capacity, any requested increase in production volumes by AMD shall be no more than [CONFIDENTIAL INFORMATION OMITTED AND FILED SEPARATELY WITH THE SECURITIES AND EXCHANGE COMMISSION] Wafers/week in any ninety (90) day period upon ninety (90) days notice from AMD up to the Reserved Production Capacity unless otherwise agreed to by TSMC. 3.2.2 AMD will purchase a minimum number of Wafers/week equal to [CONFIDENTIAL INFORMATION OMITTED AND FILED SEPARATELY WITH THE SECURITIES AND EXCHANGE COMMISSION] percent ([CONFIDENTIAL INFORMATION OMITTED AND FILED SEPARATELY WITH THE SECURITIES AND EXCHANGE COMMISSION] %) of TSMC's Reserved Production Capacity specified in the above Section 3.2.1 and in Exhibit C (1.9), provided: (i) the yield of Die per Wafer is at least [CONFIDENTIAL INFORMATION OMITTED AND FILED SEPARATELY WITH THE SECURITIES AND EXCHANGE COMMISSION] percent ([CONFIDENTIAL INFORMATION OMITTED AND FILED SEPARATELY WITH THE SECURITIES AND EXCHANGE COMMISSION] % ); and (ii) the Product can be sold with [CONFIDENTIAL INFORMATION OMITTED AND FILED SEPARATELY WITH THE SECURITIES AND EXCHANGE COMMISSION] . If requested by TSMC, AMD will provide reasonable and sufficient evidence of its [CONFIDENTIAL INFORMATION OMITTED AND FILED SEPARATELY WITH THE SECURITIES AND EXCHANGE COMMISSION] for the Product to the extent it is permitted to do so if the [CONFIDENTIAL INFORMATION OMITTED AND FILED SEPARATELY WITH THE SECURITIES AND EXCHANGE COMMISSION] given in 3.2.2 (ii). 3.2.3 If the Die cannot be sold to AMD to produce a [CONFIDENTIAL INFORMATION OMITTED AND FILED SEPARATELY WITH THE SECURITIES AND EXCHANGE COMMISSION] greater than provided in Section 3.2.2 for a particular Product and TSMC cannot thenceforward [CONFIDENTIAL INFORMATION OMITTED AND FILED SEPARATELY WITH THE SECURITIES AND EXCHANGE COMMISSION] of such Die to AMD to meet AMD's [CONFIDENTIAL INFORMATION OMITTED AND FILED SEPARATELY WITH THE SECURITIES AND EXCHANGE COMMISSION], the number of Wafers allocated to such Product shall thenceforward be subtracted from the minimum. If particular Wafers are rejected, the minimum is reduced by the number of rejected Wafers. If TSMC does not produce the number of Wafers allocated to a particular Product type, the minimum is reduced by that amount. 3.3 Actual orders shall be provided to TSMC by AMD as outlined in Exhibit D (3.3). 3.4 TSMC will purchase testing equipment (Testers) to meet AMD forecast demands. If the Testers are not used for three (3) months and there is not forecast use for the next three (3) months, at TSMC's written request, AMD shall purchase the Testers from TSMC for their depreciated value. 3.5 If AMD determines that modifications to the Products or the Qualification Requirements are required, including modifications to mask tooling, process or testing, TSMC agrees to make such modifications within a reasonable period of time after notification in writing by AMD. The 5 parties will negotiate and mutually agree upon any adjustments to the price and delivery schedules as well as charges for retooling costs if warranted by such modifications. 3.6 If Die fail to meet the Qualification Requirements, and in AMD's reasonable opinion such failure appears material, AMD may request TSMC to stop production. If TSMC is unable to correct such failures within a reasonable time not to exceed three (3) months, AMD may cancel orders for such production. AMD will notify TSMC in writing of its intention to suspend or cancel such orders and will include any substantiating data. AMD will not be liable for any charges for suspension or cancellation of such orders, provided such cancellation was warranted under the circumstances. 3.7 The Wafers with tested Die are to be provided to AMD test specifications and methodology. AMD will provide information regarding testing, equipment, and methods and will allow the use of AMD test tapes. 3.8 AMD may stop production for any or all AMD Products by giving notice to TSMC. TSMC will stop production following completion of the process steps at which the appropriate Wafers reside at the time of notification. As long as the production is stopped without fault of TSMC, AMD will pay TSMC for all such Wafers started prior to TSMC receiving such notice. Prices for such work-in- progress (WIP) Wafers will be equitably prorated based on the stage of production of the Wafers. In no event will the WIP Wafer price exceed the completed Wafer price as given in Section 8.1. Upon payment, the WIP will become the property of AMD and will be delivered to AMD immediately upon request. The parties will mutually agree as to the best course of stopping production in accordance with good manufacturing practice to prevent waste. This Section 3.8 will not affect AMD's minimum purchase commitment of Section 3.2.2. 3.9 TSMC agrees it will migrate AMD's Die to 8" Wafers during the [CONFIDENTIAL INFORMATION OMITTED AND FILED SEPARATELY WITH THE SECURITIES AND EXCHANGE COMMISSION]. 4. ON-SITE INSPECTION AND VENDOR INFORMATION 4.1 AMD representatives shall be allowed to visit TSMC's manufacturing facility during normal working hours upon reasonable notice to TSMC. 4.2 At AMD's request, TSMC will allow AMD to perform an audit of TSMC's manufacturing facility for the purpose of verifying proper production of AMD Products. TSMC will provide AMD with process control information, including but not limited to: process and electrical test yield results, current process specifications and conformance to specifications; calibration schedules and logs for equipment; environmental monitor information for air, gases and DI water; documentation of operator traceability information, and TSMC's trouble reports; all to be in accordance with the Qualification Requirements . 6 5. TERM AND TERMINATION 5.1 The Term of this Agreement shall extend until December 31, 1997 and may be renewed for subsequent one (1) year periods by the mutual agreement of the parties. The parties will discuss renewals of this Agreement at least six (6) months prior to the expiration of each Term. 5.2 In the event of any breach of this Agreement by either party hereto, if such breach is not corrected within sixty (60) days after written notice describing such breach, this Agreement may be immediately terminated by further written notice to that effect from the party noticing the breach. Termination of this Agreement shall be in addition to any other rights and remedies which may be available to the terminating party in law or in equity by reason of the other party's breach such as the following: 5.2.1 If the Agreement is terminated for AMD's breach, the restriction on exclusivity in Section 2.2 will terminate. 5.2.2 If the Agreement is terminated for TSMC's breach of Section 2.2, 2.3, 1.9, 3.1, 3.2.1, 6.1, 6.3 or 6.4, the restriction on exclusivity in Section 2.2 shall remain in effect for the period specified and the license of Section 2.3 will terminate. 5.2.3 If the Agreement is terminated for TSMC's breach other than Section 5.2.2, the manufacturing exclusivity under Section 2.2 shall continue until [CONFIDENTIAL INFORMATION OMITTED AND FILED SEPARATELY WITH THE SECURITIES AND EXCHANGE COMMISSION] and the license to TSMC under Section 2.3 shall be suspended until [CONFIDENTIAL INFORMATION OMITTED AND FILED SEPARATELY WITH THE SECURITIES AND EXCHANGE COMMISSION]. 5.3 Either party hereto shall also have the right to terminate this Agreement forthwith by giving written notice of termination to the other party at any time, upon or after: 5.3.1 the filing by such other party of a petition in bankruptcy or insolvency; or 5.3.2 any adjudication that such other party is bankrupt or insolvent; or 5.3.3 the filing by such other party of any legal action or document seeking reorganization, readjustment or arrangement of its business under any law relating to bankruptcy or insolvency; or 5.3.4 the appointment of a receiver for all or substantially all of the property of such other party; or 5.3.5 the making by such other party of any assignment for the benefit of creditors; or 5.3.6 the institution of any proceedings for the liquidation or winding up of such other party's business or for the termination of its corporate charter; or 5.3.7 the majority ownership or the controlling entity of the other party is changed. 7 6. CONFIDENTIAL INFORMATION 6.1 Except for the provisions of Section 2.2 and 2.3, TSMC and AMD agree that Confidential Information of the other will be used by them solely for the purpose of setting up the Qualified Process at TSMC and will not be disclosed to any third party without the prior written permission of the party who owns the information. The Confidential Information will only be disclosed to employees who have a need to know the Confidential Information and who have signed agreements to maintain the Confidential Information confidential. 6.2 Upon termination of this Agreement for breach, the receiving party must upon the request of the disclosing party (i) return to the other party or certify to the destruction of the original and all copies of any Confidential Information and (ii) at the disclosing party's request have one of its officers certify in writing that it will not make any further use of such Confidential Information and specifically will not manufacture or have manufactured for it any product incorporating Confidential Information. 6.3 These confidentiality provisions shall survive the termination of this Agreement for a period of five (5) years from the expiration of the Term of this Agreement. 6.4 All Confidential Information and any copies thereof are and will remain the property of the disclosing party. Any masks generated by TSMC from AMD database tapes shall be the property of AMD, will be returned to AMD upon AMD's request, and will be used only to produce Die, Wafers, or Products for AMD. All rights to improvements or modifications made by TSMC to the database tapes or test tapes are hereby assigned to AMD. No marketing or other rights are conveyed to TSMC by AMD under this Agreement. 7. WARRANTY/ACCEPTANCE TESTING 7.1 TSMC warrants that Die and/or Wafers delivered hereunder will meet the applicable specifications and shall be free from defects in material and workmanship under normal use and service for eighteen (18) months from shipment from TSMC. If, during such period (i) TSMC is notified promptly in writing upon discovery of any defect in the Die and/or Wafers, including a detailed description of such defect; (ii) samples of such Die and/or Wafers are returned to TSMC; and (iii) TSMC's examination of such Die and/or Wafers discloses that such Die and/or Wafers are defective and such defects are not caused by accident, abuse, misuse, neglect, improper installation, repair or alteration by someone other than TSMC, improper testing or use contrary to any instructions issued by TSMC or AMD, within a reasonable time, TSMC shall, at TSMC's sole option, either replace or credit AMD for such Die and/or Wafers. TSMC shall return any Die and/or Wafers replaced under this warranty to AMD transportation prepaid. The foregoing warranty constitutes TSMC's exclusive liability, and the exclusive remedy of AMD, for any breach of any warranty or other nonconformity of the Die and/or Wafers. Prior to any return of Die and/or Wafers by AMD pursuant to this Section, AMD shall afford TSMC the opportunity to inspect such Die and/or Wafers at AMD's location, and any such Die and/or Wafers so inspected shall not be returned to TSMC without its prior written consent. THIS WARRANTY IS EXCLUSIVE AND IN LIEU OF ALL OTHER WARRANTIES, EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 8 MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, WHICH ARE HEREBY EXPRESSLY DISCLAIMED. 7.2 TSMC shall immediately advise AMD whenever TSMC has reason to believe that Die and/or Wafers may not conform to the applicable specifications. 7.3 AMD may carry out reliability monitor testing of Die and/or Wafers at AMD facilities. Acceptance tests shall be performed under conditions as described in the Qualification Plan. If any Die and/or Wafers are not either accepted or rejected by AMD within thirty (30) days of receipt of such Die and/or Wafers, then such shipments of Die and/or Wafers shall be deemed accepted. 7.4 AMD may test Die and/or Wafers provided by TSMC and provide data to TSMC for the sole purpose of allowing TSMC to monitor its production in a timely manner. When Die and/or Wafer requirements increase to a level to be mutually determined by the parties, AMD will modify at its expense its test tapes for installation on a tester purchased by TSMC for the sole purpose of allowing TSMC to monitor its production. 8. PRICES/PAYMENT 8.1 AMD will purchase Die from TSMC at prices not to exceed those set forth [CONFIDENTIAL INFORMATION OMITTED AND FILED SEPARATELY WITH THE SECURITIES AND EXCHANGE COMMISSION] in the Price Table of Exhibit E (8.1). The Price Table will be updated annually at least six (6) months prior to the end of each calendar year with the mutual consent of the parties. If AMD deems it necessary to change test procedures or go to smaller than 0.5 micron manufacturing processes, then the price agreed upon in this Section 8.1 will be adjusted up or down in relation to the decrease or increase, respectively, of good Die on a Wafer. 8.2 Methods for packing, shipment, and other procedural issues are to be decided by mutual agreement after further discussions between the parties. Wafers are to be provided to AMD with tested Die accompanied by electrical test data and yield sort information. Copies of such information will be retained for two (2) years after the Term hereof at which time AMD may obtain such information upon request. 8.3 All prices are quoted in U.S. Dollars and all payments will be made in U.S. Dollars. AMD will be invoiced by TSMC upon delivery of Product and AMD agrees to pay all invoices net thirty (30) days. 8.4 The prices specified in the Price Table are exclusive of any shipping or packaging costs or sales or use tax, customs duty or impost, excise tax based on gross revenue or any similar tax or charge which might be levied as a result of the production, sale or shipment of any Wafers to AMD. AMD agrees to pay any such costs and taxes (except for taxes based on the net income of TSMC) which shall be separately stated in TSMC's invoices. TSMC shall pay any such taxes directly and AMD shall promptly reimburse TSMC in the amount thereof upon presentation by TSMC of evidence of payment. If a certificate of exemption or similar document or proceeding is to be made in order to exempt the sale from sales or use tax liability, AMD will obtain and pursue 9 such certificate, document or proceeding and present to TSMC evidence of such exemption satisfactory to TSMC no later than thirty (30) days prior to shipment. 9. DELIVERY 9.1 Unless otherwise provided herein, title and liability for risk of loss or damage to the Die and/or Wafers shall pass to AMD upon TSMC's tender of delivery of such Die and/or Wafers to a carrier which has been approved by AMD for shipment to AMD and any loss or damage thereafter shall not relieve AMD from any obligation hereunder. Delivery shall be F.O.B. TSMC Taiwan and shall be made in installments as agreed to by the parties in Section 3.3. The date of any receipt issued by the carrier shall be conclusive proof of the date of such shipment or delivery to AMD. 9.2 Default or delay by TSMC in shipping or delivering the whole or any part or installment of the Die and/or Wafers under the purchase orders shall not effect any other portion thereof nor shall it affect any other purchase order between AMD and TSMC. If any delay in delivery by TSMC of an order or portion thereof, exceeds sixty (60) days, AMD may cancel the corresponding order or portion without liability to AMD. Both parties shall have the right to delay or cancel shipments if either company is under an injunction issued by a court of competent jurisdiction which prevents such shipments. 9.3 TSMC will deliver Wafers to AMD F.O.B. Taiwan as requested by AMD. Title and risk of loss will pass upon such delivery of Wafers. TSMC will package all such Wafers for secure shipment according to good manufacturing practices in consideration of the method of shipment chosen. 10. INDEMNIFICATION 10.1 AMD will, at its own expense, indemnify and hold TSMC harmless from and against any expense or loss resulting from any infringement of any patent, trademark, copyright or mask work right to the extent arising from TSMC making Die and/or Wafers for AMD in compliance with any of AMD designs, specifications, process or instructions. AMD will defend at its own expense, any suit or proceeding brought against TSMC alleging any such infringement or infringement based on TSMC manufacturing Die and/or Wafers for AMD, provided that TSMC (i) gives AMD immediate notice of any such suit or proceeding and permits AMD through counsel of its choice, to defend such suit, and, (ii) gives AMD all needed information, assistance and authority, at AMD expense, necessary for AMD to defend any such suit or proceeding. 10.2 Except as provided for in the previous Section; TSMC shall, at its own expense, indemnify and hold AMD harmless from and against any expense or loss resulting from infringement of any patent, trademark, copyright or mask work right to the extent arising from the process used by TSMC to manufacture Die or Wafers and shall defend at its own expense any suit or proceeding brought against AMD alleging any such infringement, provided that AMD (i) gives TSMC immediate notice of any such suit or proceeding and permits TSMC through counsel of its choice, to defend such suit, and (ii) gives TSMC all needed information, assistance and authority, at TSMC's expense, necessary for TSMC to defend any such suit or proceeding. If use or sale of the Die or Wafers is enjoined, TSMC will, at its expense, procure for AMD the right to continue 10 using and selling the previously delivered Die or Wafers or modify them to become noninfringing, or refund the purchase price for such previously delivered Die or Wafers. 10.3 IN NO EVENT SHALL EITHER PARTY BE LIABLE FOR ANY INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES RESULTING FROM ITS PERFORMANCE OR FAILURE TO PERFORM UNDER THIS AGREEMENT, OR THE FURNISHING, PERFORMANCE, OR USE OF ANY GOODS OR SERVICES SOLD PURSUANT HERETO, WHETHER DUE TO A BREACH OF CONTRACT, BREACH OF WARRANTY, NEGLIGENCE OR OTHERWISE. ALL IMPLIED WARRANTIES, WHETHER OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR OTHERWISE ARE EXPRESSLY DISCLAIMED. 10.4 AMD and TSMC warrant and represent to the best of their knowledge that each has the right to enter into this Agreement and each portion of it to have TSMC manufacture Products for AMD. If either party becomes aware of a change to its continuing warranty and representation obligation under this Section, it shall so notify the other party and allow the other party an option exercisable within thirty (30) days of such notice to terminate this Agreement upon further thirty (30) days notice. 11. GENERAL 11.1 Neither party shall be in breach hereunder for any failure to perform due to causes beyond its reasonable control, including but not limited to acts of God, war, riot, embargoes, labor stoppages, acts of civil or military authorities, fire, floods, earthquakes or accidents, provided that the parts suffering such delay immediately notifies the other party of the delay and diligently works to end such delay. 11.2 TSMC will comply fully with the Export Administration Regulations of the U.S. Department of Commerce as they may be in force from time to time and specifically will not transmit, directly or indirectly, any "technical information" acquired hereunder, or any direct product of such information to Afghanistan, the Peoples Republic of China, or any "Q, S, W, Y, or Z" country, as such Terms are defined in such Regulations. 11.3 Both parties agree that the details connected with this Agreement will not be published or disclosed without the other party's written permission. However, the parties may by mutual agreement issue a public announcement and contemplate that thereafter there will be occasions when public announcements will be mutually agreed to between the parties concerning the existence of and/or the progress of the parties under this Agreement. 11.4 The relationship of each party to the other under this Agreement shall be that of an independent contractor, fully responsible and liable for its own activities under this Agreement. Neither party shall hold itself out as having authority to bind legally the other without the other party's prior written permission. Subject to the limitations set forth in this Agreement, this Agreement will inure to the benefit of and be binding upon the parties, their successors, administrators, heirs and assigns. 11 11.5 If any of the provisions of this Agreement shall be invalid or unenforceable, such invalidity or unenforceability shall not invalidate or render unenforceable the entire Agreement, but rather the entire Agreement shall be construed as if not containing the particular invalid or unenforceable provision or provisions, and the rights and obligations of AMD and TSMC shall be construed and enforced accordingly. This Agreement will be governed by the laws of the State of California, U.S.A., and the parties agree they will be subject to the personal jurisdiction of and litigation concerning this Agreement shall be brought in courts located in the State of California, U.S.A. 11.6 All notices required or permitted to be given hereunder shall be in writing by first class, certified or registered airmail, postage prepaid or by telex or telefax, if confirmed or acknowledged, to the address specified below or to such changed address as may have been previously specified in writing by the addressed party: If to TSMC: Taiwan Semiconductor Manufacturing Corporation No. 121, Park Avenue 3 Science Based Industrial Park Hsin-chu, Taiwan Republic of China Attention: General Counsel If to AMD: Advanced Micro Devices, Inc. One AMD Place P.O. Box 3453 Sunnyvale, California 94088-3453 U.S.A. Attention: General Counsel Each such notice or other communication shall for all purposes hereunder be treated as effective or as having been given as follows: (i) if delivered in person, when delivered; (ii) if sent by airmail, at the earlier of its receipt or at 5 p.m., local time of the recipient, on the seventh (7th) day after deposit in a regularly maintained receptacle for the deposition of airmail; and (iii) if sent by recognized courier service, on the date shown in the written confirmation of delivery issued by such delivery service. Either party may change the address and/or addressee(s) to whom notice must be given by giving appropriate written notice at least seven (7) days prior to the date the change becomes effective. 11.7 This Agreement and its Exhibits A through E set forth the entire understanding between AMD and TSMC with respect to the subject matter hereof and merges all prior agreements, dealings, and negotiations. The provisions of this Agreement shall govern any sales contract between the parties for the sale and purchase of the Products. Any terms or conditions printed on the face or the reverse side of the AMD purchase order sheet and/or the TSMC acknowledgement form shall not be part of this Agreement nor shall they constitute the terms and conditions of the sales contract for the Products even in case such AMD purchase order sheet or TSMC's 12 acknowledgement form is signed and returned by TSMC to AMD or AMD to TSMC, unless both parties hereto expressly agree in writing to include any such terms or conditions in this Agreement or the Exhibits. No modification, alteration or amendment shall be effective unless in writing and signed by both parties. No waiver of any breach shall be held to be a waiver of any other or subsequent breach. IN WITNESS WHEREOF, THE PARTIES HAVE HAD THEIR DULY AUTHORIZED REPRESENTATIVES EXECUTE THIS AGREEMENT IN DUPLICATE ORIGINALS TO HAVE AN EFFECTIVE DATE ON THE LAST DATE SUBSCRIBED BELOW OR ________________________________. Taiwan Semiconductor Manufacturing Corporation Advanced Micro Devices, Inc. By: /s/ D.W. Brooks By: /s/ Gene Conner --------------------------- ------------------------------ Title: President Title: Sr. V.P. ------------------------- ----------------------------- Date: 9/18/94 Date: Sept. 18, 1994 ---------------------------- ---------------------------- 13 EXHIBIT A (1.3) PRODUCTS Products: - - -------- Am486 Product Specifications: - - ---------------------- Refer to the Am486 product family Data Sheets. 14 EXHIBIT B (1.4, 1.7, 1.8) QUALIFICATION REQUIREMENTS AND PLAN I. QUALIFICATION REQUIREMENTS: 1. The process and product qualification requirements are described in the following AMD controlled documents: --Fab Process Technology Qualification Specification # 00.021.2 Revision D --Product Reliability Qualification Specification # 00.021.4 Revision A 2. TSMC will be manufacturing sorted die for AMD. The Acceptance Criteria for the die will be based on three criteria. The criteria will be Wafer Electrical Test (WET), Wafer Sort Yield, and Die Visual Quality. A. WET criteria will be based on the measurements of TSMC test structures --- prior to wafer sort. All test structures will reside on nine sites per wafer. The test structure minimum, maximum, and target will be defined and agreed upon by the parties and be incorporated by reference in this Exhibit. [CONFIDENTIAL INFORMATION OMITTED AND FILED SEPARATELY WITH THE SECURITIES AND EXCHANGE COMMISSION] of the wafers will be tested at WET. If a test is outside of the minimum - maximum range, that will constitute a failure at that site. If there are greater than [CONFIDENTIAL INFORMATION OMITTED AND FILED SEPARATELY WITH THE SECURITIES AND EXCHANGE COMMISSION] failures out of [CONFIDENTIAL INFORMATION OMITTED AND FILED SEPARATELY WITH THE SECURITIES AND EXCHANGE COMMISSION] WET site tests on a wafer for the same test, the wafer will be considered as failing the WET criteria. If the wafer is outside the WET range due to engineering tests, it will be accepted; if it is outside the range due to processing issues, then it will be a candidate for scrap. The final decision on scrap will be made by the joint AMD-TSMC disposition review process. B. The Wafer Sort Criteria will initially be set such that any wafers with a ----------------------- yield of less than [CONFIDENTIAL INFORMATION OMITTED AND FILED SEPARATELY WITH THE SECURITIES AND EXCHANGE COMMISSION] and any lots with an average yield of less than [CONFIDENTIAL INFORMATION OMITTED AND FILED SEPARATELY WITH THE SECURITIES AND EXCHANGE COMMISSION] (for the lot size of those wafers entering sort--accounting for fab yield and WET rejection) will be scrapped. (Changes in die size can trigger a review of these initial scrap limits if requested by TSMC). Recognizing that product reliability is heavily dependent on defect levels, these scrap limits will be reviewed by AMD and TSMC on a semi-annual basis and adjusted upward as yield improves. New limits should be set based on ------ yield data from the latest six (6) months of production. 15 Exhibit B (1.4, 1.7, 1.8)--Qualification Requirements (continued) The lot-scrap limit should be set at the greater of the following (Use the distribution of lot-yield averages for items (2) and (3)): (1) the present lot-scrap limit, (2) [CONFIDENTIAL INFORMATION OMITTED AND FILED SEPARATELY WITH THE SECURITIES AND EXCHANGE COMMISSION] -standard deviations less than the mean, or (3) the lower [CONFIDENTIAL INFORMATION OMITTED AND FILED SEPARATELY WITH THE SECURITIES AND EXCHANGE COMMISSION] point of the distribution (point where [CONFIDENTIAL INFORMATION OMITTED AND FILED SEPARATELY WITH THE SECURITIES AND EXCHANGE COMMISSION] of all lots pass). The wafer-scrap limit should be set at the greater of the following (Use the distribution of wafer yields for items (2) and (3) after removing scrapped lots ----- from the distribution): (1 The present wafer-scrap limit, (2) [CONFIDENTIAL INFORMATION OMITTED AND FILED SEPARATELY WITH THE SECURITIES AND EXCHANGE COMMISSION] -standard deviations less than the mean (excluding lot scraps, or (3) the lower [CONFIDENTIAL INFORMATION OMITTED AND FILED SEPARATELY WITH THE SECURITIES AND EXCHANGE COMMISSION] point of the distribution (excluding lot scraps), (point where [CONFIDENTIAL INFORMATION OMITTED AND FILED SEPARATELY WITH THE SECURITIES AND EXCHANGE COMMISSION] of all wafers pass). TSMC has the option to request a material review for disposition with AMD of any scrap material. C. Die Visual criteria will be based on AMD Product Assurance Outgoing ---------- Inspection specification #306-005, or as modified by mutual agreement of the parties. TSMC has the option on any questionable material, that does not meet the inspection criteria, to request a joint disposition review by AMD and TSMC. II. QUALIFICATION PLAN The Qualification Plan is defined by AMD's 002 Plan, which describes the Transfer Documentation for the topographical design rules and parametric specifications. The project plan will be updated and tracked by the joint AMD- TSMC start-up team. 16 EXHIBIT C (1.9) RESERVED PRODUCTION CAPACITY *** Quarter [CONFIDENTIAL INFORMATION OMITTED AND ------- FILED SEPARATELY WITH THE SECURITIES AND EXCHANGE COMMISSION] 3Q95 [CONFIDENTIAL INFORMATION OMITTED AND 4Q95 FILED SEPARATELY WITH THE SECURITIES AND EXCHANGE COMMISSION] 1Q96 2Q96 3Q96 4Q96 1Q97 2Q97 3Q97 4Q97 *The first three (3) months of production will be as set forth in Section 3.2.1.1 based on the date of Qualification; for the fourth month and beyond, the Reserved Production Capacity will be as set forth on this page. **Production will be transferred from 6" to 8" Wafers during the [CONFIDENTIAL INFORMATION OMITTED AND FILED SEPARATELY WITH THE SECURITIES AND EXCHANGE COMMISSION]. The [CONFIDENTIAL INFORMATION OMITTED AND FILED SEPARATELY WITH THE SECURITIES AND EXCHANGE COMMISSION] and [CONFIDENTIAL INFORMATION OMITTED AND FILED SEPARATELY WITH THE SECURITIES AND EXCHANGE COMMISSION] will have a production of 6" and 8" Wafers with the output being [CONFIDENTIAL INFORMATION OMITTED AND FILED SEPARATELY WITH THE SECURITIES AND EXCHANGE COMMISSION] in 2Q96 and [CONFIDENTIAL INFORMATION OMITTED AND FILED SEPARATELY WITH THE SECURITIES AND EXCHANGE COMMISSION] in 3Q96. ***Starting June 1, 1995, AMD will provide TSMC an intermediate forecast (Reforecasted Reserve Capacity) up to the Reserved Production Capacity every 6 months for the next 12 months. TSMC is obligated to supply the Reforecasted Reserve Capacity. For the first six months, AMD will purchase a minimum of [CONFIDENTIAL INFORMATION OMITTED AND FILED SEPARATELY WITH THE SECURITIES AND EXCHANGE COMMISSION] of the Reforecasted Reserve Capacity. For the second six months, AMD will purchase a minimum of [CONFIDENTIAL INFORMATION OMITTED AND FILED SEPARATELY WITH THE SECURITIES AND EXCHANGE COMMISSION] of the Reforecasted Reserve Capacity. ****The Reserved Production Capacity will be ramped down at a rate of [CONFIDENTIAL INFORMATION OMITTED AND FILED SEPARATELY WITH THE SECURITIES AND EXCHANGE COMMISSION] per quarter starting as early as 2Q97 or as late as the beginning of 4Q97. TSMC will provide the capacity as required to implement the ramp down plan. 17 EXHIBIT D (3.3) ACTUAL ORDERS A. Logistics: 1. Shipment - Date of transfer to AMD designated freight forwarder "DHL". 2. Weekly shipment cut off time is Sunday midnight. 3. Linear weekly shipments, if possible. 4. AMD will guarantee inventory (WIP) required to achieve [CONFIDENTIAL INFORMATION OMITTED AND FILED SEPARATELY WITH THE SECURITIES AND EXCHANGE COMMISSION] commitment. No delivery behind schedule more than 1 week will be accepted. 5. AMD will provide die orders using TSMC six (6) month Net Die per Wafer (NDW) forecast. 6. CVP will be measured on weekly basis. 7. TSMC to provide AMD with production capacity limitation by wafers and die limitation by product. This information to be provided monthly with the six (6) month demand forecast. 8. The TSMC WIP report is to cover rolling five (5) month periods. B. Orders: 1. 1st and 2nd months order firm with detailed mix. 2. 3rd month volume will be firm and mix change rate to be less than [CONFIDENTIAL INFORMATION OMITTED AND FILED SEPARATELY WITH THE SECURITIES AND EXCHANGE COMMISSION]% per week, AMD will define the mix by Wednesday 12:01 p.m. Pacific Standard Time (PST) of each week. 3. Confirmation is automatic from TSMC San Jose to AMD. 4. The order volume variance allowed is: 90 days--10%, 120 days--20%. C. Testing: 1. Mix change to be made only at wafer starts (10 weeks in advance). 2. AMD will guarantee testing support. If AMD fails and TSMC misses committed deliveries, then the delivery will be rescheduled based on available test time. 3. Line stoppage for mask change will be handled the same as (2). 18 EXHIBIT E (8.1) PRICE TABLE Die Prices: [CONFIDENTIAL INFORMATION OMITTED AND FILED SEPARATELY WITH THE SECURITIES AND EXCHANGE COMMISSION] Prices are [CONFIDENTIAL INFORMATION OMITTED AND FILED SEPARATELY WITH THE SECURITIES AND EXCHANGE COMMISSION] . Prices for [CONFIDENTIAL INFORMATION OMITTED AND FILED SEPARATELY WITH THE SECURITIES AND EXCHANGE COMMISSION] . 19